Digital signal processing includes the generation, filtering and detection of digital signals. Special purpose computers, commonly referred to as Digital Signal Processors (DSPs), were specially designed to handle this type of signal processing. One problem associated with using a Digital Signal Processor in Finite Impulse Response (FIR) filter applications is the large amount of processing overhead that is incurred in generating the output response of such a filter. For example, a DSP performs, inter alia, 16 multiplications to generate the impulse response of a 16-stage FIR filter. This processing overhead translates into a reduction in the amount of real-time that a DSP can allocate to performing other signal processing functions. Prior DSP arrangements deal with this overhead problem by processing signals in parallel, i.e., they split up the number of multiplications among a plurality of multiplier circuits, which are expensive. Thus, while this approach appears to reduce the processing overhead in FIR filter applications, it does so at the expense of significantly increasing the cost of the DSP.
Other prior arrangements deal with this overhead problem by speeding up the system clock to reduce the amount of time that is used to perform a multiplication. However, this solution is far from ideal since the signal degrading effect of parasitic capacitances increases at higher clock rates.